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  ? at a glance ? product brief s3157 gpon transceiver with cdr empowering intelligent optical networks 1 pb2023_v1.00_08/25/05 description the s3157 gpon transceiver chip is a fully integrated serialization/ deserialization gpon oc-48/24/12 transceiver interface device. the s3157 receives an oc-48/24/12 non-return to zero (nrz) signal and recovers the clock from the data. the chip performs all necessary serial-to-parallel and parallel-to-serial functions in conformance with gpon transmission standards. the device is suitable for gpon-based applications. the figure below shows a typical network application. on-chip clock synthesis is performed by the high-frequency phase-locked loop (pll) on the s3157 transceiver chip allowing the use of a slower external transmit clock reference. the chip can be used with a 155.52 or 166.63 mhz reference clock in support of existing system clocking schemes. the low jitter lvpecl interface is compliant with the bit-error rate requirements of the itu-t standards. the s3157 is packaged in a 196 pbga, offering designers a small package outline. overview the s3157 transceiver implements gpon serialization/deserialization, and transmission functions. this chip can be used to implement the front end of gpon equipment, which consists primarily of the serial transmit interface and the serial receive interface. the chip handles all the functions of these two elements, including parallel-to-serial and serial-to-parallel conversion, clock generation, and system timing. the s3157 is divided into a transmitter section and a receiver section. the sequence of operations is as follows: transmitter operations: 1. 16-bit parallel input 2. parallel-to-serial conversion 3. serial output receiver operations: 1. clock and data recovery from serial input 2. serial-to-parallel conversion 3. 16-bit parallel output due to the asynchronous nature of the gpon, the fpga that connects to the s3157 has to accommodate for the 1/2 upstream data rate. features ? 650 mw typical power ? integrated clock data recovery ? on-chip high-frequency pll for clock generation and clock recovery ? supports oc-48/24/12 rates ? reference frequency of 155.52 to 166.63 mhz ? rx and tx reference selectable ? interface to lvcmos/lvttl logic ? internal input termination option built-in ? 16-bit differential lvpecl/ lvds data path or single- ended lvpecl option ? 196 pbga package ? diagnostic and line loopback mode ? support serial loop timing mode ? lock detect ? signal detect input with polarity select ? low jitter lvpecl/lvds inter- face ? internal fifo to decouple transmit clocks continued on next page... figure 1. system block diagram tx: ? rate adaptation fpga rx: 2.5 g, 1.25 g or 622 mbps fpga 16 amcc s3157 16 ? amcc s3157 olt 16 ? amcc s2060 optical mux pon splitter e/o o/e catv 1.25 gbps 622 mbps 155 mbps 2.5 gbps 1.25 gbps 622 mbps 16 onu
amcc reserves the right to make changes to its products, or to discontinue any product or service without notice, and advises its customers to obtain the latest version of relevant information to verify, before placing orders, that the information being relied upon is current. amcc is a registered trademark of applied micro circuits corporation. copyright ? 200 5 applied micro circuits corporation. all rights reserved. product brief s3157 gpon transceiver with cdr pb2023_v1.00_08/25/05 2 empowering intelligent optical networks confidential and proprietary 6290 sequence drive ? san diego, ca 92121 ? tel: 858 450-9333 ? fax: 858 450-9885 ? http://www.amcc.com distribute only on a need-to-know basis, and subj ect to applicable nda. not to be disclosed to or used by any other person with out prior authorization. amcc suggested interface device amcc s2060 gigabit ethernet transceiver ? dual 1.2 v and 3.3 v/2.5v sup- ply ? complies with itu-t specifica- tions ? built-in self test applications ? gpos-based transmission systems ? gpon onu (optical network unit) ? gpon olt (optical line ter- mination) ? gpon test equipment figure 2. s3157 ordering information prefix package device s ? integrated circuit 3157 pb - 196 pbga x xxxx xx prefix device package


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